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concept and design: added transpiler section
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Daniel
2025-04-06 13:59:14 +02:00
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17
thesis/chapters/implementation.tex
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@ -14,6 +14,21 @@ Talk about why this needs to be done and how it is done (the why is basically: s
\section{Interpreter}
Talk about how the interpreter has been developed.
UML-Ablaufdiagram
main loop; kernel transpiled by CUDA.jl into PTX and then executed
Memory access (currently global memory only)
no dynamic memory allocation like on CPU (stack needs to have fixed size)
\section{Transpiler}
Talk about how the transpiler has been developed
Talk about how the transpiler has been developed (probably largest section, because it just has more interesting parts)
UML-Ablaufdiagram
Front-End and Back-End
Caching of back-end results
PTX code generated and compiled using CUDA.jl (so basically the driver) and then executed
Memory access (global memory and register management especially register management)