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72 Commits

Author SHA1 Message Date
2b9c394f1b benchmarking: improved performance with @inbounds. still slower in most cases
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2025-04-01 21:48:59 +02:00
d9c83caad9 benchmarking: updated blocksize to 256 with moderate improvements
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2025-03-30 13:56:25 +02:00
1dc0c1898d benchmarking: fixed bugs; took initial_benchmark
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2025-03-30 12:54:50 +02:00
ad175abac0 benchmarking: added gpu evaluators to performance testing. getting execution errors still
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2025-03-29 13:35:59 +01:00
690ee33db1 benchmarks: started preparing benchmarks
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2025-03-29 12:01:06 +01:00
effd477558 transpiler: generates valid PTX and evaluates expressions correctly
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2025-03-28 19:32:48 +01:00
9df78ca72e transpiler: invalid memory access error finally fixed
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2025-03-27 22:32:24 +01:00
561b37160b transpiler: trying to fix problem with writing to global memory; not yet fixed
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2025-03-27 18:00:31 +01:00
eaee21ca75 transpiler: results are now written in results array; preperation for performance testing
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2025-03-27 09:55:29 +01:00
baa37ea183 code: started finalising transpilation process and preparing for performance testing and tuning
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2025-03-23 13:38:22 +01:00
daniwipes
db02e9f90f
Merge pull request #1 from daniwipes/cpu-interpreter
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Cpu interpreter
2025-03-23 10:23:54 +01:00
e33be8f59e relwork: finished second read to improve wording and correct mistakes
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2025-03-23 09:57:23 +01:00
3c289f13d1 relwork: slight rewording and fixing errors
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2025-03-21 17:49:55 +01:00
a718a3572e relwork: finished relwork
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2025-03-21 14:35:55 +01:00
db3ea32b66 relwork: continuation of compilers section
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2025-03-20 13:31:45 +01:00
d514b07434 relwork: started compilers section
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2025-03-18 10:32:14 +01:00
de5493ca3e relwork: finished occupancy and ptx sections
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2025-03-16 17:43:32 +01:00
84fdf5c9ca relwork: continuation of programing gpus
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2025-03-15 14:33:33 +01:00
f3446a2b11 finished implementing thesis feedback
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2025-03-14 16:11:25 +01:00
ed9d8766be started implementing feedback
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2025-03-13 13:18:50 +01:00
fddfa23b4f related work: slight restructuring; continued with section programming gpus
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2025-03-09 13:04:12 +01:00
4e48686b62 related work: small continuation of explaining SIMT
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2025-03-08 14:12:50 +01:00
b683f3ae96 relwork: continued with 'programming GPUs'
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2025-03-08 12:28:46 +01:00
203e157f11 Related work: continuation of GPGPU
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2025-03-02 12:23:59 +01:00
34d98f9997 Related Work: finished equation learning section; started GPGPU section
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2025-03-01 13:14:37 +01:00
28ef6b121e related work: continuation of equation learning section
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2025-02-27 11:41:01 +01:00
99ed6a1cca Related Work: started with equation learning section
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2025-02-26 13:34:46 +01:00
52b5407b5c Introduction: slight improvements
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2025-02-23 11:11:00 +01:00
433e69fff5 Introduction: finished first version of chapter
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2025-02-22 11:42:18 +01:00
Gabriel Kronberger
f4f39ec47c Improvements / fixes. 2025-02-19 17:18:43 +01:00
Gabriel Kronberger
942adb8612 Add CPU Interpreter and a test case. 2025-02-19 16:38:11 +01:00
8bad911585 introduction: updated background + research question
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2025-02-15 11:12:44 +01:00
250da02353 updated introduction: background and motivation
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2025-02-14 12:42:42 +01:00
4afc15a737 small cleanup
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2025-01-26 10:16:23 +01:00
7598c51df8 finished generating parameter loading code
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2025-01-25 11:15:54 +01:00
b2774322a1 added loading of variables from memory into registers. Note: Needed to leave, so code currently not compiling
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2025-01-24 13:13:53 +01:00
85464083c3 aded symtable for loading vars and params to local memory
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2025-01-19 11:00:29 +01:00
219c0bb14e started implementing parameter loading
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2025-01-06 14:01:55 +01:00
f7926c3438 finished implementing operators
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2025-01-05 11:19:03 +01:00
094f8c9499 Merge branch 'main' of https://github.com/daniwipes/master-thesis
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2025-01-04 10:40:26 +01:00
9702fe2343 added thesis structure
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2025-01-04 10:38:27 +01:00
Daniel Wiplinger
a97b804530 testing interpreter because loop seems to do everything. Can't test right now because I don't have a nvidia gpu in my laptop 2024-12-11 11:29:54 +01:00
8d129dbfcc rewrote function for generating code for operators. now the entire operation will be returned and not just the operator
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2024-12-10 22:58:18 +01:00
67ef9a5139 reworked code to use new 'register manager'
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2024-12-08 10:50:09 +01:00
203900bb26 nevermind, improved register management worked
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2024-12-07 10:23:04 +01:00
1e7f6e9010 tried streamlining register management
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2024-12-07 10:12:53 +01:00
68cedd75fc updated all to 32-bit to save registers and boost performance
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2024-11-01 11:23:58 +01:00
9fc55c4c15 started implementing transpilation of expression
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2024-10-27 11:48:11 +01:00
0e24d74e54 small increment and fixes
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2024-10-26 11:41:00 +02:00
ee3c5001bd added information on how to best approach register assignment
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2024-10-20 12:24:18 +02:00